1. Field of the Invention
The present invention relates to a DC power supply voltage regulator circuit, and is applied to, for example, a series-type DC power supply voltage regulator circuit.
2. Description of the Related Art
Conventionally, a series-type DC power supply voltage regulator circuit has been used in order to supply a DC voltage to a load such as an IC circuit. In usual cases, a capacitor is connected in parallel to a load, thereby to compensate a response performance of the DC power supply voltage regulator circuit. Owing to the presence of the capacitor, the load of the regulator circuit becomes a capacitive one, and a phase delay occurs due to an output resistance and a load capacitance of the regulator circuit. This makes it difficult to execute stabilization by negative feedback.
On the other hand, as a common means for preventing oscillation due to a capacitive load, there is known a technique wherein a resistor element is inserted between an output terminal of an error amplifier and the capacitive load, and a signal for phase compensation is derived from a connection node between the output terminal of the error amplifier and the resistor element, thereby preventing a phase delay due to the capacitive load from causing oscillation (see, for example, Michio Okamura, “Design of OP AMP Circuit (Second Series)”, CQ Publishing Co., Ltd., Tokyo, Japan, 1st Ed., pp. 68-71, FIGS. 3-23, Nov. 5, 1978).
In this phase compensation technique, a DC component and a low-frequency component of a voltage between both ends of a capacitive load, on one hand, and a high-frequency component of an error amplifier output signal (which bypassing delayed signal on both ends of said capacitive load), on the other hand, are separately fed back to inputs of said an error amplifier. Thereby, without causing oscillation, a predetermined DC voltage and low-frequency signal are applied to the capacitive load.
In detail, a high-frequency component of the voltage at the output terminal includes a phase delay due to an output resistance of the error amplifier and the capacitive load. If this phase delay is combined with a phase delay within the error amplifier, the phase, in some cases, rotates by 360° and oscillation occurs. The DC and low-frequency components of the voltage at the output terminal are fed back to the error amplifier via a resistive element. However, since the input resistance of the error amplifier is very high, the DC component of the voltage at the output terminal is exactly fed back to the error amplifier even if a resistor element is inserted.
Although the resistor element is inserted between the output of the error amplifier and the output terminal, the resistance value of the resistor element, when viewed from the output terminal side, appears to be the reciprocal of the amplification factor of the error amplifier. Thus, the resistor element does not affect the DC voltage at the output terminal.
The high-frequency component at the output terminal is attenuated by a low-pass filter which is substantially constituted by the resistive element and capacitive element, and the attenuated high-frequency component is fed back to the error amplifier. Therefore, oscillation can be prevented even if a phase delay occurs in the signal at the output terminal due to the output resistance of the error amplifier, the resistor element and the capacitive load.
However, if this phase compensation technique is to be applied to the power supply regulator circuit, the oscillation can be prevented but the input/output voltage difference of the regulator circuit increases by a degree corresponding to a voltage drop due to the inserted resistor element and load current.
If the above-described well-known means for capacitive load driving is to be applied to the conventional DC power supply voltage regulator circuit, oscillation can be prevented but the input/output voltage difference increases. Thus, the range of applications of this well-known means is limited.